Method for Producing a Semiconductor Device

ABSTRACT

A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.

This application is a continuation of application Ser. No. 13/365,774filed on Feb. 3, 2013, which claims priority to German PatentApplication 10 2011 010 248.5 filed Feb. 3, 2011 and is incorporatedherein by reference.

TECHNICAL FIELD

Exemplary embodiments of the invention relate to a method for producinga semiconductor device having a sidewall insulation.

BACKGROUND

Semiconductor devices having sidewall insulation are necessary, forexample. for CSP (chip size package) device packages, wherein, in aparticularly space-saving embodiment, a contact area is formed at asidewall of a semiconductor body. The contact area is insulated from thesemiconductor body by a sidewall insulation layer. Such an embodiment isdescribed, e.g., in German publication DE 10 2005 004 160 A1 and U.S.counterpart U.S. Pat. No. 7,663,222 B2.

Further examples of semiconductor devices having sidewall insulation areadditionally known for power semiconductor components. Such asemiconductor device is described, for example, in German publication DE103 51 028 A1 and U.S. counterpart U.S. Pat. No. 7,378,741.

SUMMARY

In one aspect, the invention provides a method for producing asemiconductor device having a sidewall insulation. For example, a thicksidewall insulation.

In one embodiment, a semiconductor device having a sidewall insulationis featured. A semiconductor body has a first side and a second sidelying opposite the first side. At least one first trench is at leastpartly filled with insulation material extending from the first side inthe direction toward the second side into the semiconductor body. The atleast one first trench is produced between a first semiconductor bodyregion for a first semiconductor device and a second semiconductor bodyregion for a second semiconductor device.

An isolating trench is found proceeding from the first side of thesemiconductor body in the direction toward the second side of thesemiconductor body between the first and second semiconductor bodyregions in such a way that at least part of the insulation material ofthe first trench adjoins at least a sidewall of the isolating trench.The second side of the semiconductor body is at least partially removedas far as the isolating trench.

By producing the trench at least partly filled with insulation materialand producing the isolating trench in a separate step, it is possible toform the sidewall insulation without an overhang at sidewalls of thesemiconductor body which extend perpendicularly to the surface of thesemiconductor body. In particular, this applies to thick sidewallinsulations having layer thicknesses of >2 μm. Such an overhang would bedisadvantageous, for example, for subsequent patterning of a sidewallmetallization because this can give rise to shading during thelithography step. By virtue of avoiding this shading caused by theoverhang, the patterning of subsequent electrically conductive layers atthe sidewalls is possible in a sufficiently reproducible or controlledmanner. Moreover, the production of the first trench at least partlyfilled with insulation material can be concluded before the productionof the functional semiconductor structures of a semiconductor componentin the semiconductor device. As a result, there is no influence on theproduction of the semiconductor component structures, such as, e.g.,outdiffusions during a thermal oxidation. Therefore, it is also possibleto use high-temperature processes for the production of the sidewallinsulation.

One development of the method is if at least two first trenches areproduced between the first and second semiconductor body regions,wherein the isolating trench is produced between two of the firsttrenches. Particularly if at least part of the insulation material of arespective first trench adjoins two opposite sidewalls of the isolatingtrench, it is possible, for example, to produce a plurality ofsemiconductor devices simultaneously with a sidewall insulation.

An alternative embodiment for simultaneously producing a plurality ofsemiconductor devices having a sidewall insulation is if the isolatingtrench is produced in the at least one first trench. That is applicable,in particular, if the insulation material of the first trench adjoinstwo opposite sidewalls of the isolating trench.

One embodiment provides for the first trench to have a width B of atleast 2 μm and the isolating trench to be produced in such a way that aninsulation layer composed of the insulation material of the first trenchhaving a thickness D of at least 2 μm adjoins the at least one sidewallof the isolating trench. The at least 2 μm thick insulation layerproduced in this way makes it possible to reduce, for example, parasiticcapacitances between the semiconductor body and a subsequently appliedexemplary metal layer on the sidewalls. Moreover, in the case of a powersemiconductor component, it is possible to avoid an electrical breakdownthrough the insulation layer.

One exemplary embodiment for producing the first trench comprises thefollowing features. At least two subtrenches are produced alongside oneanother in the region of the first trench to be produced, extending fromthe first side in the direction toward the second side into thesemiconductor body in such a way that a ridge of the semiconductor bodyis formed between the two subtrenches. The ridge between the twosubtrenches is converted into an insulation material.

By producing such a lamellar array of the semiconductor body withsubsequent conversion of the ridge into an insulation region, it ispossible to produce an insulating spatial volume having any desiredwidth and/or depth for the sidewall insulation. In a further exemplaryembodiment, an unfilled part of the subtrench possibly remaining afterthe process of converting the ridge into an insulation material can befilled with a material, in order to achieve, for example, a highermechanical stability. In order to improve the insulation properties, theremaining unfilled part of the subtrench can also be filled with aninsulation material. It is particularly advantageous if the remainingunfilled part of the subtrench is filled with a material that has astress-reducing effect. This is because, in the case of the use ofshifting materials having different physical properties such as, e.g.,materials having different lattice constants or having differentcoefficients of thermal expansion, mechanical stress can occur betweenthe material combinations. In order to compensate for this mechanicalstress brought about, e.g., between the semiconductor body and theinsulation material, use is made of a material for stress compensation.In this case, this material should have those physical parameters whichcounteract the stress-causing physical parameters of the othermaterials.

One embodiment for producing the first trench provides for the ridge tobe converted into the insulation material by oxidation. By thermaloxidation, in particular, the ridge composed of semiconductor material,such as, e.g., silicon, can thereby be converted into an insulationmaterial in a very simple manner.

One development of the method is, after producing the at least one firsttrench, in each case at least one dopant region is formed in thesemiconductor body for the first and second semiconductor devices. Byway of example, functional regions for the desired semiconductorcomponents in the semiconductor device are thus produced.

A further development of the method is, after producing the isolatingtrench, an electrically conductive layer is produced on the insulationmaterial of the first trench, which insulation material adjoins thesidewall of the isolating trench, in the isolating trench. This givesrise, e.g., to metallization layers on the sidewalls of thesemiconductor device. Particularly by virtue of the fact that theelectrically conductive layer is produced in such a way that it extendsfrom the insulation material of the first trench that adjoins thesidewall of the isolating trench as far as at least one dopant region,wherein the at least one dopant region and the insulation material areassigned to the same semiconductor device, it is possible to utilize theelectrically conductive layer as a connection pad for the semiconductorcomponents of the semiconductor device. In this case, the positioning ofthe connection pads on the sidewalls is particularly space-saving andallows the production of small semiconductor devices.

One development of this space-saving arrangement is if an electricallyconductive contact element is formed between the electrically conductivelayer and the at least one dopant region, such that an electricalconnection is produced between the at least one dopant region and theelectrically conductive layer.

One embodiment of the method is if the semiconductor body is providedwith an insulation layer, running parallel to the surface of the firstside of the semiconductor body, in the semiconductor body. For thispurpose, it is possible to use SOI material, for example. Particularlyif the at least first trench is produced as far as the insulation layerrunning parallel to the surface of the first side in the semiconductorbody, it is possible to set the depth of the first trench in thesemiconductor body very exactly. For this purpose, the insulation layeris embedded in the desired depth, corresponding to the height of thelater semiconductor device. The production of the first trench, inparticular of subtrenches possibly used therefor, can end on theinsulation layer in a defined manner during etching processes, forexample. Moreover, the insulation layer affords the advantage that thelater semiconductor device can have a rear side protected by theinsulation layer if the second side of the semiconductor body is removedas far as the insulation layer.

In one embodiment, the sidewall of the isolating trench can be producedwith a positive flank angle. In this case, a positive flank angle meansthat the isolating trench tapers from the first side in the directiontoward the second side. As a result of the positive flank angle, theproduction of the electrically conductive layer on the insulationmaterial can be significantly simplified because it is possible to avoidshading in the lithography step for patterning the electricallyconductive layer as a result of a possibly occurring overhang at thesidewall insulation.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1C, collectively FIG. 1, show an exemplary embodiment of amethod for producing a semiconductor device having a sidewall insulationin schematic cross-sectional views;

FIGS. 2A-2C, collectively FIG. 2, show an exemplary embodiment of amethod for producing a semiconductor device having a sidewall insulationin schematic cross-sectional views;

FIGS. 3A-3C, collectively FIG. 3, show an exemplary embodiment of amethod for producing a semiconductor device having a sidewall insulationin schematic cross-sectional views;

FIGS. 4A-4C, collectively FIG. 4, show an exemplary embodiment of amethod for producing a trench at least partly filled with insulationmaterial in schematic cross-sectional views;

FIG. 5 shows, in a schematic cross-sectional view, an intermediate stepfor producing a dopant region in the semiconductor body;

FIG. 6 shows, in a schematic cross-sectional view, an intermediate stepof the method with an electrically conductive layer on the sidewallinsulation;

FIG. 7 shows an intermediate step of the method with a conductive layeron the sidewall insulation and with electrically conductive contactelements between the electrically conductive layer and a dopant regionin the semiconductor body;

FIG. 8 shows an exemplary embodiment with an insulation layer runningparallel to the surface of the semiconductor body; and

FIG. 9 shows a semiconductor device in a three-dimensional illustration.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

Exemplary embodiments of the invention are explained in greater detailbelow, referring to the accompanying figures. However, the invention isnot restricted to the embodiments specifically described, but rather canbe modified and altered in a suitable manner. It lies within the scopeof the invention to suitably combine individual features and featurecombinations of one embodiment with features and feature combinations ofanother embodiment in order to arrive at further embodiments accordingto the invention.

Before the exemplary embodiments of the present invention are explainedin greater detail below with reference to the figures, it is pointed outthat identical elements in the figures are provided with the same orsimilar reference signs, and that a repeated description of theseelements is omitted. Furthermore, the figures are not necessarily trueto scale; rather, the main emphasis is on elucidating the basicprinciple.

In FIG. 1A, a semiconductor body 10 is provided as starting material.The semiconductor body 10 can be produced, for example, frommonocrystalline silicon, silicon carbide, gallium nitrite, galliumarsenide or some other semiconducting material. The semiconductor bodyis generally embodied in plate-type fashion with a first side 11 and asecond side 12 lying opposite the first side 11. In this case, thesemiconductor body 10 can be in its original form a slice, also oftendesignated as a “wafer.” In further production steps, the slice cansubsequently also be separated into small individual parts (chips,semiconductor devices).

In the semiconductor body 10, at least one first trench 14 is producedwhich extends into the semiconductor body 10 proceeding from the firstside 11 in the direction toward the second side 12. The first trench 14can in this case be produced, for example, by an etching process intothe semiconductor body, in a particular example by means of adry-chemical etching process. In this case, the at least one firsttrench 14 is produced between a first semiconductor body region 10 a fora first semiconductor device and a second semiconductor body region 10bfor a second semiconductor device and is at least partly filled with aninsulation material 13. In this case, in one advantageous embodiment,the first trench should have at least a width B >2 μm and be at leastpartly filled with an at least 2 μm thick insulation layer on thesidewalls of the first trench 14. In this case, by way of example,silicon oxide, silane oxide or some other electrically insulatingmaterial is appropriate as the insulation material 13. The at leastpartial filling of the first trench 14 with the insulation material 13can be effected, for example, by depositing the insulation material atleast on the sidewalls of the first trench 14.

Another possibility for producing a first trench 14 at least partlyfilled with insulation material 13 would be to convert the semiconductormaterial of the semiconductor body 10 into an insulation material 13 bya conversion process such as, e.g., oxidation, in particular thermaloxidation. In this case, the first trench 14 at least partly filled withinsulation material is initially at least not completely etched out fromthe semiconductor body, rather the first trench 14 will arise as aresult of the conversion of the semiconductor material into aninsulation material 13 in the semiconductor body 10. A suitable processfor converting a semiconductor material into an insulation material isknown, for example, for producing field oxides or as the LOCOS processin conventional silicon technologies and comprises thermal oxidation ofthe semiconductor material.

FIG. 1B illustrates the result of a further method step, wherein anisolating trench 15 was produced. In this case, the isolating trench 15likewise extends in a manner proceeding from the first side 11 of thesemiconductor body 10 in the direction toward the second side 12 of thesemiconductor body 10. The isolating trench 15 is produced between thefirst and second semiconductor body regions 10 a, 10 b in such a waythat it adjoins at least part of the insulation material 13 of the firsttrench 14 at least with a sidewall 16. In one advantageous exemplaryembodiment, the sidewall 16 of the isolating trench 15 has a positiveflank angle, that is to say that the isolating trench tapers from thefirst side 11 in the direction toward the second side 12. The isolatingtrench 15 can, for example, likewise be produced by an etching processinto the semiconductor body 10. In this case, the isolating trench 15can be produced in a self-aligned manner by selective etching withrespect to the insulation material 13. In this case, the insulationmaterial 13 serves as a hard mask for the semiconductor materialetching. The isolating trench 15 can be embodied either with a smallerdepth than, the same depth as, or even with a somewhat larger depththan, the first trench 14. It is advantageous, however, if the firsttrench 14 and the isolating trench 15 are embodied with approximatelythe same depth. The isolating trench 15 is preferably produced after thefirst trench 14.

FIG. 1C schematically shows two singulated semiconductor devices 20 and30. The singulation of the semiconductor devices 20, 30 from thesemiconductor body 10 is effected by at least partly removing the secondside 12 of the semiconductor body 10 as far as the isolating trench 15.The at least partial removal of the second side 12 of the semiconductorbody 10 is effected, e.g., by a grinding process or a combined grindingand etching process (CMP). However, it is also possible to carry out asawing step at the rear side, which involves severing the semiconductorbody 10 below the isolating trench 15, for example, using a saw blade ora laser cutter.

FIG. 2 shows an exemplary embodiment of a method for producing asemiconductor device having a sidewall insulation, wherein, in contrastto the exemplary embodiment in accordance with FIG. 1, two firsttrenches 14 at least partly filled with insulation material 13 areproduced between the first semiconductor body region 10 a and the secondsemiconductor body region 10 b. FIG. 2A illustrates two first trenches14 by way of example. In this case, the two first trenches 14 areproduced in a manner spaced apart from one another. In this case, afirst trench 14 directly adjoins the first semiconductor body region 10a and the other first trench 14 directly adjoins the secondsemiconductor body 10 b. Both the first trenches 14 are preferablyproduced simultaneously.

As shown in FIG. 2B, the isolating trench 15 is produced between thesetwo first trenches 14. In this case, one sidewall 16 of the isolatingtrench 15 directly adjoins the insulation material 13 of one firsttrench 14, while the other sidewall 17 of the isolating trench 15directly adjoins the insulation material 13 of the other first trench14.

FIG. 2C illustrates the two semiconductor devices 20 and 30 which ariseafter the removal of the second side of the semiconductor body 10, thatis to say after a process of thinning the semiconductor body 10, as faras the isolating trench 15. The sidewalls of the respectivesemiconductor device 20 or 30 are thus formed by the insulation material13. Therefore, each of the semiconductor devices 20 and 30 produced hasa sidewall insulation preferably over the entire sidewall. The sidewallinsulation should preferably have a thickness D of at least 2 μm.

FIG. 3 shows a further exemplary embodiment of a method for producing asemiconductor device having sidewall insulation. As illustrated in FIG.3A, in this case firstly a wide first trench 14 filled with insulationmaterial 13 is produced into the semiconductor body 10 proceeding fromthe first side 11 in the direction toward the second side 12. In thiscase, the wide first trench 14 is likewise arranged between the firstsemiconductor body zone 10 a and the second semiconductor body zone 10 band in this case extends in a lateral direction x completely betweenthese two semiconductor body regions 10 a and 10 b. In this case, in oneadvantageous embodiment, the width B of the first trench 14 should be >4μm.

As shown in FIG. 3B, the isolating trench 15 is produced in the firsttrench 14, such that the isolating trench 15 divides the insulationmaterial 13 into two separate insulation layers 13′ and 13″ each havinga thickness D. The sidewalls 16 and 17 of the isolating trench 15therefore directly adjoin the remaining insulation material 13 of theinsulation layers 13′ and 13″. In this case, the depth of the isolatingtrench 15 should preferably be at least as deep as the depth of thefirst trench 14. It is advantageous if the depths of the first trench 14and of the isolating trench 15 are identical.

In the subsequent process for thinning the semiconductor body, asillustrated in FIG. 3C, two separate semiconductor devices 20 and 30 areproduced by the removal of the semiconductor body 10 at the second side12 as far as the isolating trench 15. In this case, the sidewalls of therespective semiconductor devices have a sidewall insulation formed bythe insulation layers 13′ and 13″. In this case, the previously producedisolating trench 15 should preferably have been produced such that thesidewall insulation has a remaining thickness D>2 μm.

FIG. 4 shows an embodiment for producing a first trench at least partlyfilled with insulation material. As illustrated in FIG. 4A, in a regionof the semiconductor body 10 in which a first trench 14 is intended tobe formed, a plurality of subtrenches 41, 42, 43 and 44 lying alongsideone another are produced into the semiconductor body 10 proceeding fromthe first side 11 in the direction toward the second side 12. Thesubtrenches 41, 42, 43 and 44 are produced in this case, for example, bymeans of a masked etching process, in particular a dry-chemical etchingprocess, wherein a patterned etching mask on the first side 11 of thesemiconductor body 10 is applied and the etching of the semiconductormaterial takes place at the unmasked surface regions of thesemiconductor body 10. It is advantageous if the unmasked surfaceregions for etching the subtrenches are as far as possible of the samesize, because very similar subtrenches having almost identicaldimensions thus arise. In particular the depth of the individualsubtrenches 41 to 44 can thus be produced very uniformly. As a result ofthe production of the subtrenches 41, 42, 43 and 44, thin ridges 51, 52and 53 of the semiconductor body 10 are formed between the subtrenches41 to 44. The subtrenches 41 to 44 should preferably be produced with aspacing of <2 μm, in order that a ridge having a width of <2 μmrespectively remains between the subtrenches 41 to 44.

As indicated in FIG. 4B, the ridges 51, 52 and 53 between thesubtrenches 41 to 44 are converted into an insulation material. This iseffected, for example, by means of an oxidation process, in particularby means of thermal oxidation of the semiconductor material of thesemiconductor body 10. Using the example of a silicon semiconductormaterial, therefore, SiO₂ regions 13 a thus arise as a result of theconversion of the ridges into an insulation material. Moreover, upon theexemplary thermal oxidation of silicon, SiO₂ insulation regions 13 balso arise in the semiconductor body, which form the outermost edge ofthe first trench 14 thus produced. If, as shown in FIG. 4B, unfilledparts 41 a 42 a, 43 a and 44 a of the subtrenches still remain after theconversion of the ridges 51, 52 and 53 into insulation regions 13 a, theremaining unfilled parts 41 a to 44 a of the subtrenches can optionallybe filled with a material. In particular, the remaining unfilled partsof the subtrenches can also be filled with an insulation material. Forthis purpose, by way of example, TEOS is appropriate for conformalfilling. In this case, one advantageous embodiment is if the remainingunfilled part of the subtrench is filled with a material that has astress-reducing effect. This is taken to mean materials which counteracta mechanical stress that arises on account of the different materialproperties of the semiconductor body 10 and of the insulation regions 13a and 13 b converted into the insulation material 13. By way of example,but without restriction, amorphous silicon shall be mentioned here asstress-reducing material.

FIG. 4C shows the result of a according to the above-describedembodiment for producing a first trench 14 having a width B in thesemiconductor body 10 using the example of two trenches 14 produced. Inthis example shown, the trench 14 is completely filled with insulationmaterial 13.

FIG. 5 shows a development of the method for producing a semiconductordevice having a sidewall insulation, wherein firstly a dopant region 50is additionally formed in the semiconductor body 10 for eachsemiconductor device to be produced. This can be a region dopedcomplementarily, that is to say with a different conduction type, withrespect to the semiconductor body 10 or a region doped with the sameconduction type as the semiconductor body 10, but with a higher dopantconcentration. In this case, the production of this at least oneadditional dopant region 50 in the semiconductor body 10 is preferablyeffected after the production of the at least first trench, in order toavoid, for example, thermal influences on the dopant region 50 duringthe production of the first trench. In particular, one advantageousembodiment is if the dopant region 50 is implemented before theisolating trench 15 is produced. The additional dopant region 50 forms,for example, in the case of the complementary doping with respect to thesemiconductor body 10, a pn junction. Such pn junctions are required formany active semiconductor components such as, e.g., diodes, transistors,thyristors, IGBTs, etc.

FIG. 6 illustrates the situation in which, after the production of theisolating trench 15, an electrically conductive layer 60 was produced onthe insulation material 13 of the first trench, which insulationmaterial adjoins the sidewalls 16 and 17 of the isolating trench 15, inthe isolating trench. In particular, the situation is shown in which theelectrically conductive layer 60 was produced in such a way that itextends from the insulation material 13 of the first trench, whichinsulation material adjoins the sidewalls 16, 17 of the isolating trench15, as far as at least one dopant region 50. In this case, the dopantregion 50 and the insulation material 13 are respectively assigned tothe same semiconductor device 20, 30.

In the example illustrated, the electrically conductive layer 60 isproduced in such a way that it is isolated from the semiconductor body10 over extensive parts of the surface of the semiconductor body 10 atthe first side 11 by a dielectric layer 62. In the contact region 61,the dielectric layer 62 is interrupted, as a result of which the contactof the electrically conductive layer 60 with the dopant region 50 ismade possible. The electrically conductive layer 60 is produced, forexample, by areally applying a metal layer on the semiconductor body. Inthe isolating trench 15, the electrically conductive layer also depositson the sidewalls 16, 17. In particular, this deposition of theelectrically conductive layer 60 on the sidewalls 16 and 17 is fosteredwhen the sidewalls 16 and 17 have a positive flank angle. Afterward, theelectrically conductive layer 60 applied over the whole area can bepatterned, for example, by photolithographic steps and subsequentetching.

FIG. 7 shows an embodiment of the method for producing a semiconductordevice having a sidewall insulation, wherein the electrically conductivelayer 60 is contact-connected to the dopant region 50 via electricallyconductive contact elements 70. The electrically conductive contactelements 70 extend through the dielectric layer 62 and produce anelectrical connection between the dopant region 50 in the semiconductorbody 10 and the electrically conductive layer 60 arranged above thedielectric layer 62. The electrically conductive layer 60 can, asillustrated in the exemplary embodiment with regard to FIG. 7, also beapplied completely along the sidewall insulation on the insulationmaterial 13. In this case, the insulation material 13 can also extendover a part of the surface of the semiconductor body 10 at the firstside 11.

FIG. 8 shows the intermediate result of an embodiment of the method forproducing a semiconductor device having sidewall insulation, wherein thesemiconductor body 10 is provided with an insulation layer 80 runningparallel to the surface of the first side 11 of the semiconductor body10. This can be done, e.g., by providing an SOI material, wherein thesemiconductor body 10 has a lower semiconductor body part 81 and anupper semiconductor body part 82, which are isolated from one another byan insulation layer, such as, e.g., an oxide layer. The insulation layer80 is embedded into the semiconductor body 10 in a desired depth, forexample, which corresponds to the height of the later semiconductordevice. The first trench 14 is thereupon produced, in the illustratedexample by the formation of subtrenches 41, 42, 43 and 44, as far as theembedded insulation layer 80 in the upper semiconductor body part 82. Inthis case, the subtrenches 41 to 44 are produced, for example, byetching with the aid of a patterned mask 83 on the surface of thesemiconductor body 10. The complete formation of the first trench 14 atleast partly filled with insulation material 13 is effected according tothe basic method such as has already been explained in greater detailwith regard to the exemplary embodiment in accordance with FIG. 4. Oneadvantage of this embodiment is that the first trench 14 is producedwith a defined depth, namely as far as the insulation layer 80. Afurther advantage is that the semiconductor device thereby produced hasa rear side insulated by an insulation layer 80. For this purpose,during the removal of the second side 12 of the semiconductor body 10,only the lower semiconductor body part 81 has to be removed and theinsulation layer 80 has to be retained at least at the rear side of thesemiconductor devices to be produced.

FIG. 9 shows, in a three-dimensional illustration, a semiconductordevice which was produced according to the method described. Thesemiconductor device has a parallelepipedal basic shape. Thesemiconductor body (not visible) is provided with a thick sidewallinsulation composed of an insulation material 13 at the sidewalls 90 and91. The surface 92 of the semiconductor device likewise has at least oneinsulating dielectric layer 62. A plurality of electrically conductivelayers 60 spaced apart from one another are formed at the sidewalls 90,91 on the insulation material 13 and extend over the surface 92 as faras the electrical contact regions 61, in which the electricallyconductive layers 60 produce an electrically conductive connectionthrough the dielectric layer 62 to dopant regions formed in thesemiconductor body.

What is claimed is:
 1. A method for producing a semiconductor devicehaving a sidewall insulation, the method comprising: forming a firsttrench that is at least partly filled with an insulation material, thefirst trench extending from a first surface of a semiconductor body intothe semiconductor body toward a second surface of the semiconductorbody, wherein the first trench is formed between a first semiconductorbody region for a first semiconductor device and a second semiconductorbody region for a second semiconductor device; forming an isolatingtrench that extends from the first surface of the semiconductor bodytoward the second surface of the semiconductor body between the firstand second semiconductor body regions, wherein at least one sidewall ofthe isolating trench adjoins a sidewall of the first trench comprisingthe insulation material, wherein at least one other opposite sidewall ofthe isolating trench adjoins a sidewall of a semiconductor region of thesemiconductor body, wherein a portion of the sidewall contacting theinsulation material is laterally across a portion of the oppositesidewall contacting the semiconductor region along a plane parallel tothe first surface; and singulating the semiconductor body to separatethe first semiconductor device from the second semiconductor device,wherein singulating the semiconductor body comprises removing a portionof the semiconductor body at the second surface as far as the isolatingtrench.
 2. The method as claimed in claim 1, wherein forming the firsttrench comprises forming a plurality of first trenches between the firstand second semiconductor body regions, wherein the isolating trench isformed between two of the first trenches.
 3. The method as claimed inclaim 1, wherein the isolating trench is formed in a first trench. 4.The method as claimed in claim 1, wherein the first trench has a width Bof at least 2 μm and the isolating trench is formed in such a way thatan insulation layer composed of the insulation material of the firsttrench having a thickness D of at least 2 μm adjoins the sidewall of theisolating trench.
 5. The method as claimed in claim 1, wherein formingthe first trench comprises: forming a plurality of subtrenches alongsideone another in a region where the first trench is to be formed, thesubtrenches extending from the first surface toward the second surfacein such a way that a ridge of the semiconductor body is formed betweenthe subtrenches; and converting the ridge into an insulation material.6. The method as claimed in claim 5, wherein an unfilled part of thesubtrench remaining after converting the ridge into an insulationmaterial is filled with a material.
 7. The method as claimed in claim 6,wherein the unfilled part of the subtrench is filled with an insulationmaterial.
 8. The method as claimed in claim 7, wherein the unfilled partof the subtrench is filled with a material that has a stress-reducingeffect.
 9. The method as claimed in claim 5, wherein the ridge isconverted into the insulation material by oxidation.
 10. The method asclaimed in claim 1, further comprising, after forming the first trench,forming a dopant region in the semiconductor body for the firstsemiconductor device.
 11. The method as claimed in claim 10, furthercomprising, after forming the isolating trench, forming an electricallyconductive layer on the insulation material of the first trench, whereinthe insulation material adjoins the sidewall of the isolating trench,wherein the electrically conductive layer is formed in such a way thatit extends from the insulation material of the first trench that adjoinsthe sidewall of the isolating trench as far as at least one contactregion for the dopant region, wherein the dopant region and theinsulation material are part of the first semiconductor device.
 12. Themethod as claimed in claim 11, further comprising an electricallyconductive contact element in the contact region between theelectrically conductive layer and the dopant region, such that anelectrical connection is formed between the dopant region and theelectrically conductive layer.
 13. The method as claimed in claim 1,further comprising, after forming the isolating trench, forming anelectrically conductive layer on the insulation material of the firsttrench, wherein the insulation material adjoins the sidewall of theisolating trench.
 14. The method as claimed in claim 1, furthercomprising forming an insulation layer in the semiconductor bodyparallel to the first surface.
 15. The method as claimed in claim 14,wherein the first trench is formed as far as the insulation layer. 16.The method as claimed in claim 1, wherein the sidewall of the isolatingtrench is formed with a positive flank angle.
 17. The method as claimedin claim 1, wherein, after the singulating, the first semiconductordevice comprises a major sidewall including the insulation material andthe second semiconductor device comprises a major sidewall exposing aportion of the semiconductor region of the semiconductor body.
 18. Amethod for producing a semiconductor device having a sidewallinsulation, the method comprising: providing a semiconductor waferhaving a first surface and a second surface opposite the first surface,the semiconductor wafer comprising a first semiconductor device and asecond semiconductor device; forming a first trench filled at leastpartly with an insulation material, the first trench extending from thefirst surface into the semiconductor wafer toward the second surface,wherein the first trench is formed between a first semiconductor bodyregion for the first semiconductor device and a second semiconductorbody region for the second semiconductor device, wherein forming thefirst trench comprising forming a plurality of subtrenches, lining theplurality of subtrenches with a first insulation material, and fillingthe plurality of subtrenches with amorphous silicon, wherein theamorphous silicon is configured to counteract mechanical stressgenerated by lining the plurality of subtrenches with the firstinsulation material; forming an isolating trench in the first trench,wherein at least part of the insulation material of the first trenchadjoins a sidewall of the isolating trench, wherein at least one otheropposite sidewall of the isolating trench adjoins a sidewall of asemiconductor region of the first semiconductor body region, wherein aportion of the sidewall contacting the insulation material is laterallyacross a portion of the opposite sidewall contacting the semiconductorregion along a plane parallel to the first surface; and singulating thesemiconductor wafer to separate the first semiconductor device from thesecond semiconductor device, wherein singulating the semiconductor wafercomprises thinning the semiconductor wafer from the second surface tothe isolating trench.
 19. The method as claimed in claim 18, wherein theinsulation material of the first trench adjoins two opposite sidewallsof the isolating trench.